A switch-mode power converter (also referred to as a “power converter”) is a power supply or power processing circuit that converts an input voltage waveform into a specified output voltage waveform. Controllers associated with the power converters manage an operation thereof by controlling the conduction periods of power switches employed therein. Generally, the controllers are coupled between an input and output of the power converter in a feedback loop configuration.
Typically, the controller measures an internal operating characteristic (e.g., an internal bus voltage) or an output characteristic, (e.g., an output voltage or an output current) representing an operating condition of the power converter, and based thereon modifies a duty cycle of a power switch or power switches of the power converter to regulate the internal operating characteristic or the output characteristic. The duty cycle is a ratio represented by a conduction period of a power switch to a switching period thereof. Thus, if a power switch conducts for half of the switching period, the duty cycle for the power switch would be 0.5 (or 50 percent). Additionally, as the needs for systems such as a microprocessor powered by the power converter dynamically change (e.g., as a computational load on the microprocessor changes), the controller should be configured to dynamically increase or decrease the duty cycle of the power switches therein to regulate the internal or the output characteristic at a desired value. In an exemplary application, the power converters have the capability to convert an unregulated dc input voltage such as five volts to a lower, regulated, dc output voltage such as 2.5 volts to power a load. In another exemplary application, the power converters have the capability to convert an unregulated ac input voltage such as 120 volts to a regulated internal dc bus voltage, such as 300 volts dc, and to further convert the regulated internal dc bus voltage into a dc output voltage such as 2.5 volts to power a load.
An important consideration for the design of a power converter and its controller is the efficiency (also referred to as “operating efficiency”) in a particular application, and under particular operating conditions. The efficiency of a power converter is the ratio of its output power to its input power. The practical efficiency of a power converter that delivers at least half its rated output power to a load is typically 80 to 90%. As load current is reduced, the operating efficiency correspondingly goes down. In the limiting case wherein the load current approaches a small percentage of the maximum rated current of the power converter, the operating efficiency approaches zero due to the need to provide power for fixed internal loads such as the controller itself, for drivers, for internal high-frequency power switches, and for inherently dissipative circuit elements such as the magnetic core of a high-frequency transformer. Power converter efficiency is accordingly dependent on an internal operating characteristic of the power converter or an output characteristic thereof. Examples of an internal operating characteristic include a temperature of a component part, an internal bus voltage, the voltage level of a drive signal for a power switch, the number of paralleled power switches selectively enabled to conduct, the number of phases enabled on a power converter, or even the basic switching frequency of the power converter. Examples of an output characteristic include a load current drawn from the power converter and an output voltage. Power converter efficiency is also dependent on a parameter that may be measured after a manufacturing step, which may reflect a dependency of efficiency on particular parts used to manufacture the power converter in question.
Operating efficiency is an important quality indicator for a power converter because of the broad impact efficiency has on equipment reliability and size, operating expense, and corresponding effects on the load equipment that it powers. Thus, system considerations of achieving high operating efficiency have immediate effects on the applicability of a particular power converter design, and the associated price thereof in the marketplace.
Numerous prior art attempts have been made to improve the operating efficiency of a power converter. Most attempts have focused on selection of proper components to provide the maximum operating efficiency for average operating conditions at a chosen operating point, such as a load current at three quarters of a maximum rated value, the environmental temperature at a typical expected value, and for a typical mix of actual components employed to manufacture a particular power converter. Recognizing the wide range of possible values for any of these parameters, there is substantial opportunity to improve the efficiency of a power converter for a particular operating condition.
An example of the prior art to provide high power converter efficiency at a particular operating condition is provided in U.S. Pat. No. 6,351,396, entitled “Method and Apparatus for Dynamically Altering Operation of a Converter Device to Improve Conversion Efficiency,” to Jacobs, issued Feb. 26, 2002 which is incorporated herein by reference. Jacobs is directed to a search process that varies parameters accessible to the controller during power converter operation, such as a timing delay between conduction intervals of the power switches, and observes the resulting effect on the duty cycle. The duty cycle is employed as an indicator of operating efficiency, and parameters accessible to the controller are adjusted to produce an extremum in the duty cycle for a particular operating condition, thereby increasing the operating efficiency of the power converter. While Jacobs performs efficiency optimization under actual operating conditions, the reference nonetheless fails to consider constraints of the actual application (such as described in a requirements document or operating specification document) or the environment during execution of the process of efficiency optimization, or a signal from an external source to enable, limit, or alter the optimization process. For example, no attempt is made to measure a parameter of a particular power converter after a manufacturing step (or to measure a parameter of a representative power converter), or to control, program, or otherwise alter a response of the controller to reflect such measurement, such as by controlling an internal operating characteristic or an output characteristic.
Another attempt to adaptively operate a power converter to improve efficiency is described in U.S. Pat. No. 5,742,491, entitled “Power Converter Adaptively Driven,” to Bowman, et al. (“Bowman”), issued Apr. 21, 1998, which is incorporated herein by reference. Bowman is directed to a drive circuit for a power converter wherein the timing of conduction intervals for the power switches is programmed to increase the efficiency of the power converter while keeping stresses on individual components within acceptable limits. A predetermined delay between drive waveforms supplied to the power switches and to the synchronous rectifiers of the power converter is altered with a predetermined program that is a function of an operating condition of the power converter to allow the power converter to operate efficiently in an anticipated operating environment and with anticipated component realizations. A design objective is to desensitize the operating efficiency to an expected range of changes in the operating environment and with an anticipated range of component realizations, which results in a compromise in a static program to optimize efficiency that might otherwise be achievable with the design of an improved controller not so limited. Bowman relies on a limited set of a priori conditions, and does not adjust controller parameters in response to a measured power converter parameter for the particular power converter after a manufacturing step, or to a measured parameter of a representative power converter (e.g., from a group of manufactured units), or in response to a signal from an external source representing an environmental parameter.
A further attempt to optimize power conversion efficiency is described in U.S. Pat. No. 5,734,564, entitled “High-Efficiency Switching Power Converter,” to Brkovic, issued Mar. 31, 1998, which is incorporated herein by reference. Brkovic describes measuring an internal operating characteristic of a power train of the power converter (i.e., a voltage across a power switch) and adjusting a timing of a duty cycle for the power switch in response to the measured power switch voltage to improve power conversion efficiency. Brkovic provides a preconditioned response to a measured parameter of the particular power converter after a manufacturing step. Brkovic does not consider adapting or constraining the response to a signal from an external source representing an environmental parameter.
It is well known in the art to couple an input control signal to a power converter to control the setpoint of an output characteristic thereof. For example, the output voltage of a power converter adapted to supply power to a microprocessor load (wherein the operating voltage thereof is not known at the time of manufacture, or that is changed during normal operation such as when a microprocessor enters a sleep mode) can be statically or dynamically altered by an input control signal. However, this control mechanism merely changes a setpoint for an output characteristic of the power converter, and is not adapted to optimize the efficiency of the power converter at the signaled setpoint.
It should also be taken into account that there are loads with different operating states. For example, a server configured to process financial data may operate at a higher level of criticality during normal business hours, and revert to a lower processing state at another time of day. The aforementioned system may require a higher level of performance from the power converter during such periods of high criticality, which may compromise operating efficiency, but which may admit higher operating efficiency during substantial periods of time in the lower processing state.
Power conversion systems of the prior art have only partially responded to such system operational state considerations in the optimization of operating efficiency, particularly at a system level. For example, the Advanced Configuration and Power Interface (“ACPI”) specification is an open industry standard initially produced in December 1996 that describes “P-states” and “C-states” of a processor employed in a digital system, and which is incorporated herein by reference. The P-state, typically designated as P-states P0, P1, and P2, describes the “performance” state (or, alternatively, the “power” state) of the processor as high, medium, or low, respectively, for example, as described by Alon Naveh, et al., in the article entitled “Power and Thermal Management in the Intel® Core Duo™ Processor, Intel Technology Journal, May 15, 2006, pp. 109-121, which is incorporated herein by reference. The P-state is selected by the software operating system to meet the execution needs of the software load as observed over a period of time. A particular P-state is affected by setting, from a set of predetermined values from a list, the core input voltage of the processor and its clock rate. The processor core input voltage is adjusted by sending a digital signal such as a “VID” code to the processor's point-of-load voltage source. A processor operating at a lower core voltage and with a slower clock operates at a substantially lower power level.
Another processor state indicator, the core state (“C-state”), also under software operating system control, affects its level of power consumption from another perspective. The highest processor C-state, C0, describes a processor at its full operational level. Lower C-state levels, C1, C2, . . . , C4, describe various levels of a processor sleep state. The C-state level C1 provides the minimum level of power saving, but provides the fastest response time back to the full operational level C-state level C0. The C-state level C4 provides a “deep sleep” level, but requires substantial time for the processor to return to normal operation. The various sleep levels are achieved by halting instruction execution, gating internal clocks, disabling internal phase-locked loops, and disabling ports that respond to certain levels of interrupts. The minimum core voltage necessary to retain certain volatile memory elements is applied.
Although these state indicators have been used to substantially reduce the energy requirement of a digital system at the system level, particularly the power level during an idling state, corresponding states have not been described for elements of the power system as it responds to the various operational levels of the load, such as a request for a particular load voltage, or a particular level of system readiness, or the response time for changes in a system operational level. Accordingly, opportunities for further improvement in power converter operational efficiency have not been realized.
Thus, attempts have been made in the prior art to configure power converter controllers to statically optimize power conversion efficiency of a power train. The static responses have included varying an internal operating characteristic of the power converter with a fixed program in response to a measured characteristic such as a load current to improve power conversion efficiency, or in response to observed changes in power converter duty cycle. The aforementioned attempts to improve efficiency have been facilitated by inclusion of programmable digital devices such as microprocessors, digital signal processors, application specific integrated circuits, and field-programmable gate arrays in the controller. Nonetheless, the responses of a controller have not included consideration of a measured parameter after a manufacturing step for the particular power converter that is being controlled such as a measurement of an actual delay of a particular power switch or an internal circuit after completion of a stage of manufacture, or a signal indicating a system operational state.
Considering limitations as described above, a controller for a power converter is presently not available for the more severe applications that lie ahead that depend on achieving higher operating efficiency for a particular operating characteristic constrained or controlled by an environmental parameter. In addition, a controller for a power converter is presently not available that responds to a parameter measured after a manufacturing step for the particular power converter, or to a parameter measured after a manufacturing step on a representative power converter, or on power converters in a representative run, to improve the operating efficiency thereof. A controller for a power converter is also presently not available that responds to a signal indicating a system operational state to improve operating efficiency at a system level.
Accordingly, what is needed in the art is a controller for a power converter and power system that adaptively improves power conversion efficiency of a power converter in response to a measured parameter of the power converter after a manufacturing step, or to a parameter measured on a representative power converter, and includes consideration of operating conditions, a signal from an external source representing an environmental parameter or system operational state of a load coupled to the power system. In accordance therewith, a controller for a power converter and power system is provided that adaptively improves power conversion efficiency, including considerations as provided herein.